Synopsys, Inc., the world leader in semiconductor design software, is pleased to announce the availability of IC Validator vQ-2019.12-SP2 is a signoff physical verification solution that improves productivity for customers at all process nodes i.e., from mature to advanced.
IC Validator physical verification is a comprehensive and high-performance signoff solution that improves productivity for customers at all process nodes, from mature to advanced. IC Validator offers the industry’s best distributed processing scalability to over 4,000 CPU cores. The tool’s performance and scalability enabled some of the industry’s largest reticle limit chips with billions of transistors, same-day design rule checking (DRC), layout versus schematic (LVS), and fill turnaround time. IC Validator is seamlessly integrated with the Synopsys Fusion Compiler RTL-to-GDSII solution and IC Compiler II place and route system in the Fusion Design Platform. This integrated fusion technology accelerates design closure for manufacturing by enabling independent signoff-quality analysis and automatic repair within the implementation environment.
Learn how to run Design Rule Checks (DRC) using IC Validator.
Synopsys, Inc. is the world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia.
Product: Synopsys IC Validator
Version: vQ-2019.12-SP2
Supported Architectures: x86_64
Website Home Page : http://www.synopsys.com
Languages Supported: english
System Requirements: Linux *
Size: 2.1 Gb
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